View PHKD13N03LT_326262.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PHKD13N03LT
M3D315
Dual TrenchMOSTM logic level FET
Rev. 01 -- 23 June 2003 Product data
1. Product profile
1.1 Description
Dual N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM technology. Product availability: PHKD13N03LT in SOT96-1 (SO8).
1.2 Features
s Low gate charge s Low on-state resistance s Surface mount package s Fast switching.
1.3 Applications
s Portable appliances s Lithium-ion battery chargers s Notebook computers s DC-to-DC converters.
1.4 Quick reference data
s VDS 30 V s Ptot 3.57 W s ID 10.4 A s RDSon 20 m
2. Pinning information
Table 1: Pin 1 2 3 4 5,6 7,8 Pinning - SOT96-1 (SO8), simplified outline and symbol Description source1 (s1) gate1 (g1) source2 (s2) gate2 (g2) drain2 (d2) drain1 (d1)
1 Top view 4
MBK187
Simplified outline
8 5
Symbol
d1 d1 d2 d2
SOT96-1 (SO8)
s1
g
1
s2
g
2
MBK725
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
3. Limiting values
Table 2: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM
[1]
Conditions 25 C Tj 150 C 25 C Tj 150 C; RGS = 20 k Tsp = 25 C; VGS = 10 V; Figure 2 and 3 Tsp = 100 C; VGS = 10 V; Figure 2 Tsp = 25 C; pulsed; tp 10 s; Figure 3 Tsp = 25 C; Figure 1
[1] [1] [1]
Min -55 -55
[1] [1]
Max 30 30 20 10.4 6.6 42 3.57 +150 +150 3.2 42
Unit V V V A A A W C C A A
drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature
Source-drain diode source (diode forward) current (DC) Tsp = 25 C peak source (diode forward) current Tsp = 25 C; pulsed; tp 10 s
Single device conducting.
-
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
2 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
120 Pder (%) 80
03aa17
120 Ider (%) 80
03aa25
40
40
0 0 50 100 150 Tsp (C) 200
0 0 50 100 150 200 Tsp (C)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 5 V
ID I der = ------------------- x 100% I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of solder point temperature.
Fig 2. Normalized continuous drain current as a function of solder point temperature.
102
003aaa368
ID (A)
Limit RDSon = VDS/ID
tp = 10 s
10
100 s
1 ms 10 ms
1
DC 100 ms
10-1 10-1
1
10
VDS (V)
102
Tsp = 25 C; IDM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
3 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
4. Thermal characteristics
Table 3: Rth(j-sp) Rth(j-a) Thermal characteristics Conditions Figure 4 minimum footprint; mounted on a printed-circuit board Min Typ 70 Max 35 Unit K/W K/W thermal resistance from junction to solder point thermal resistance from junction to ambient Symbol Parameter
4.1 Transient thermal impedance
102 Zth(j-sp) (K/W)
003aaa415
= 0.5
10
0.2 0.1 0.05 0.02
1 single pulse
P
=
tp T
tp T
10-1 10-4 10-3 10-2 10-1 1
t
tp (s)
10
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
4 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
5. Characteristics
Table 4: Characteristics Tj = 25 C unless otherwise specified. Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 A; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 250 A; VDS = VGS; Figure 9 Tj = 25 C Tj = 150 C Tj = -55 C IDSS drain-source leakage current VDS = 24 V; VGS = 0 V Tj = 25 C Tj = 100 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 20 V; VDS = 0 V VGS = 10 V; ID = 8 A; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 4.5 V; ID = 7 A; Figure 7 Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 7 A; VGS = 0 V; Figure 12 reverse recovery time recovered charge IS = 7 A; dIS/dt = -100 A/s; VR = 30 V; VGS = 0 V VDD = 15 V; ID = 1.5 A; VGS = 10 V; RG = 6 VGS = 0 V; VDS = 15 V; f = 1 MHz; Figure 11 ID = 5 A; VDD = 15 V; VGS = 5 V; Figure 13 10.7 2.7 3.9 752 200 130 6 7 23 11 0.86 25 5 1.1 nC nC nC pF pF pF ns ns ns ns V ns nC 17 21 20 34 26 m m m 1 5 100 A A nA 1 0.5 1.5 2 2.2 30 27 V V V V V V Conditions Min Typ Max Unit
Source-drain diode
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
5 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
10 ID (A) 8 3V
003aaa325
10 ID (A) 8
003aaa326
VGS = 2.8 V
VDS > ID x RDSon
5V 10 V 2.7 V
6 Tj = 150 C
6 2.6 V
4
2.5 V 2.4 V
4 25 C 2
2
2.3 V
0
0 0 0.5 1 1.5 VDS (V) 2
0
1
2 VGS (V)
3
Tj = 25 C
Tj = 25 C and 150 C; VDS > ID x RDSon
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
80 RDSon (m) 60
2.5 V 2.6 V
003aaa327
2 a 1.5
03aa27
VGS = 2.8 V
40
3V
1
4V
20
5V 10 V
0.5
0 0 2 4 6 8 ID (A) 10
0 -60 0 60 120 Tj (C) 180
Tj = 25 C
R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
6 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
2.5 VGS(th) (V) 2 max
03aa33
10-1 ID (A) 10-2
003aaa426
1.5
typ
10-3 min typ max
1
min
10-4
0.5
10-5
0 -60 0 60 120 Tj (C) 180
10-6 0 1 2 VGS (V) 3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = 5 V
Fig 9. Gate-source threshold voltage as a function of junction temperature.
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
104 C (pF) 103
003aaa328
Ciss
102
Coss Crss
10 10-1
1
10
VDS (V)
102
VGS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
7 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
8 IS (A) 6
003aaa329
5 VGS (V) 4
003aaa330
Tj = 150 C
4
3
25 C
2
2
1
0 0.2 0.4 0.6 0.8 VSD (V) 1
0 0 5 10 QG (nC) 15
Tj = 25 C and 150 C; VGS = 0 V
ID = 8 A; VDD = 15 V
Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.
Fig 13. Gate-source voltage as a function of gate charge; typical values.
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
8 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
6. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 pin 1 index Lp 1 e bp 4 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-18
Fig 14. SOT96-1 (SO8).
9397 750 11612 (c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
9 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
7. Revision history
Table 5: Rev Date 01 20030623 Revision history CPCN Description Product data (9397 750 11612)
9397 750 11612
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
10 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
8. Data sheet status
Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
9. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
11. Trademarks
TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V.
10. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 11612
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 01 -- 23 June 2003
11 of 12
Philips Semiconductors
PHKD13N03LT
Dual TrenchMOSTM logic level FET
Contents
1 1.1 1.2 1.3 1.4 2 3 4 4.1 5 6 7 8 9 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
(c) Koninklijke Philips Electronics N.V. 2003. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 23 June 2003 Document order number: 9397 750 11612

▲Up To Search▲

Price & Availability of PHKD13N03LT

	To Download PHKD13N03LT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .